1. Field of the Invention
The present invention relates to memory modules having a magnetoresistive element, a memory system using the memory modules, an information processing apparatus and a method for transferring data from the memory system.
2. Description of the Related Art
An information processing apparatus, such as a personal computer, PDA, or cellular phone uses many memory modules. As for the memory module, implementation using a DRAM, a SRAM, a FeRAM, an EEPROM, and so on are well known in the art. Memory cells of the memory module are volatile or lose data whenever reading data from the cells. Therefore, the memory module has a buffer memory that stores data temporarily, and it is necessary to perform a rewrite operation.
The memory module performs a collective writing of data to the memory cells where an activated column line and row line cross. Therefore, the memory module is not able to electrically connect both read-sense circuits and read-drive circuits to both a column direction and a row direction of each memory cell, although the memory cell has a symmetrical structure in both the column direction and the row direction. In other words, a control device, which controls the memory module can not directly access a memory cell of the memory module symmetrically by the column direction and the row direction.
The memory module collectively writes and reads data in a unit of a data width (for example, 8 bits). In case of the information processing apparatus having memory modules, the information processing apparatus uses a memory system that arranges a plurality of memory modules in parallel. The number of the memory modules is based on a data bus width (for example, 32 bits) in the information processing apparatus. That is, the information processing apparatus reads a data from the memory system and writes data to the memory system in a unit of the data bus width. Further, the information processing apparatus performs a burst transfer which transfers data blocks continuously in a unit of the data bus width.
An information processing apparatus may use an interleave method at the time of the data transfer, in order to cope with a lack of continuous data. The interleave method rearranges data of a column direction into data of a row direction and transfers the rearranged data by every column direction. The interleave method increases the processor load. Japanese Patent Publication “KOKAI” No. 2001-084155 discloses a memory circuit which performs the interleave method exclusively. However, to use the exclusive circuit is problematic in that the information processing apparatus is made larger. Moreover, for example, the information processing apparatus may read data stored in a rectangular area of a memory system and may transfer the rectangular area to a graphic processor. Since the memory system comprises the above memory modules, the information processing apparatus must read data from the memory system by a unit of the data bus width and by every row. In almost all cases, a bit size of a column direction of the rectangular area is different from the data bus width. The data transfer efficiency is poor because the transferred data includes much unnecessary data.